sli4_iscsi.h

Go to the documentation of this file.

/*
 * Copyright (c) 2011-2015, Emulex
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 *    this list of conditions and the following disclaimer in the documentation
 *    and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 */

/**
 * @file
 * Define iSCSI SLI-4 structures and function prototypes.
 */

#ifndef _SLI4_ISCSI_H
#define _SLI4_ISCSI_H

#include "sli4.h"
#include "ocs_ioctl.h"

#define HW_MAX_SGLE_SIZE    (64*1024)

typedef enum {
    SLI_IP_TYPE_V4        = 0x01,
    SLI_IP_TYPE_V4_STATIC     = 0x03,
    SLI_IP_TYPE_V4_DHCP   = 0x05,
    SLI_IP_TYPE_V6        = 0x10,
    SLI_IP_TYPE_V6_ROUTABLE   = 0x30,
    SLI_IP_TYPE_V6_LINK_LOCAL = 0x50
} sli4_ip_type_type_e;

/**
 * @brief IP_ADDRESS_FORMAT
 *
 * Structure to represent an IP address.
 */
typedef struct sli4_ip_addr_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t struct_size:16,
        :8,
        ip_type:8;
    uint8_t ip_addr[16];
    uint32_t rsvd;
#else
#error big endian version not defined
#endif
} sli4_ip_addr_t;

typedef struct sli4_isns_ip_addr_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t struct_size:16,
        :8,
        ip_type:8;
    uint8_t ip_addr[16];
    uint32_t rsvd0;
    uint32_t tcp_port:16,
        udp_port:16;
#else
#error big endian version not defined
#endif
} sli4_isns_ip_addr_t;

/**
 * @brief IP_ADDRESS_SUBNET_FORMAT
 *
 * Structure to represent an IP address with a subnet.
 */
typedef struct sli4_ip_addr_subnet_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t struct_size:16,
        ip_type:8,
        ipv6_prefix_len:8;
    uint8_t ip_addr[16];
    uint8_t subnet[16];
    uint32_t rsvd;
#else
#error big endian version not defined
#endif
} sli4_ip_addr_subnet_t;

/**
 * @brief ROUTE_TABLE_ENTRY_FORMAT
 *
 * Structure to represent an entry in route table
 */
typedef struct sli4_route_table_entry_s {
    sli4_ip_addr_subnet_t ip_sub;
    sli4_ip_addr_t gateway;
} sli4_route_table_entry_t;

/**
 * @brief SESSION_LOGIN_OPTIONS
 *
 * Structure to represent an iSCSI login parameters shared in a session.
 */
typedef struct sli4_session_login_options_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t flags:8,
        error_recovery_level:8,
        :16;
    uint32_t first_burst;
    uint32_t max_burst;
    uint32_t max_connections:16,
        max_r2t:16;
    uint32_t def_time_to_wait:16,
        def_time_to_retain:16;
#else
#error big endian version not defined
#endif
} sli4_session_login_options_t;

#define SLI_LOGIN_FLAG_INITIAL_R2T        0x01
#define SLI_LOGIN_FLAG_IMMEDIATE_DATA         0x02
#define SLI_LOGIN_FLAG_DATA_PDU_IN_ORDER      0x04
#define SLI_LOGIN_FLAG_DATA_SEQUENCE_IN_ORDER 0x08

/**
 * @brief TARGET_LOGIN_OPTIONS
 *
 * Structure to represent an the iSCSI login parameters on a connection.
 */
typedef struct sli4_target_login_options_s {
    sli4_session_login_options_t session_options;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t connection_flags:8,
        data_digest:8,
        hdr_digest:8,
        :8;
    uint32_t max_rcv_dsl;
#else
#error big endian version not defined
#endif
} sli4_target_login_options_t;

/*************************************************************************
 * SLI-4 iSCSI mailbox command formats and definitions
 */

/**
 * iSCSI Common opcode (OPC) values
 */
#define SLI4_OPC_ISCSI_ERROR_RECOVERY_INVALIDATE_CMDS   0x01
#define SLI4_OPC_ISCSI_CFG_POST_SGL_PAGES       0x02
#define SLI4_OPC_ISCSI_CFG_REMOVE_SGL_PAGES     0x03
#define SLI4_OPC_ISCSI_NTWK_GET_ROUTE_TABLE     0x0A
#define SLI4_OPC_ISCSI_NTWK_SET_ROUTE_TABLE     0x0B
#define SLI4_OPC_ISCSI_NTWK_IFACE_CREATE        0x0C
#define SLI4_OPC_ISCSI_NTWK_IFACE_DELETE        0x0D
#define SLI4_OPC_ISCSI_NTWK_CONFIGURE_STATELESS_IP_ADDR 0x11
#define SLI4_OPC_ISCSI_NTWK_RELEASE_STATELESS_IP_ADDR   0x12
#define SLI4_OPC_ISCSI_NTWK_DISCOVER_ISNS_SERVER    0x13
#define SLI4_OPC_ISCSI_NTWK_DISCOVERED_ISNS_SERVERS 0x14
#define SLI4_OPC_ISCSI_NTWK_MODIFY_IP_ADDR      0x15
#define SLI4_OPC_ISCSI_NTWK_GET_DEFAULT_GATEWAY     0x16
#define SLI4_OPC_ISCSI_NTWK_MODIFY_DEFAULT_GATEWAY  0x17
#define SLI4_OPC_ISCSI_NTWK_GET_ALL_IF_ID       0x18
#define SLI4_OPC_ISCSI_NTWK_GET_IF_INFO         0x19
#define SLI4_OPC_ISCSI_CLEANUP              0x3B
#define SLI4_OPC_ISCSI_SET_FRAGNUM_BITS         0x3D
#define SLI4_OPC_ISCSI_DEFQ_CREATE          0x40
#define SLI4_OPC_ISCSI_DEFQ_DESTROY         0x41
#define SLI4_OPC_ISCSI_WQ_CREATE            0x42
#define SLI4_OPC_ISCSI_WQ_DESTROY           0x43
#define SLI4_OPC_ISCSI_NTWK_SET_MTU         0x44
#define SLI4_OPC_ISCSI_TCP_CONNECT_AND_OFFLOAD      0x46
#define SLI4_OPC_ISCSI_TCP_DISCONNECT           0x47
#define SLI4_OPC_ISCSI_GET_CONNECTION_INFO      0x4a

/**
 * @brief COMMON_ISCSI_ERROR_RECOVERY_INVALIDATE_CMDS
 *
 * Invalidate one or more iSCSI Commands
 */
typedef struct sli4_req_common_iscsi_invalidate_cmds_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    ref_handle;
    uint32_t    icd_count;
    struct {
        uint32_t    icd:16,
            cid:16;
    } icds[128];
    uint32_t    cleanup_type:16,
        :16;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_invalidate_cmds_t;

#define SLI4_ISCSI_INVALIDATE_CMDS_STATUS_SUCCESS     0x01
#define SLI4_ISCSI_INVALIDATE_CMDS_STATUS_ICD_NOT_FOUND   0x02
#define SLI4_ISCSI_INVALIDATE_CMDS_STATUS_UNKNOWN_ERROR   0x04

typedef struct sli4_res_common_iscsi_invalidate_cmds_s {
    sli4_res_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    ref_handle;
    uint32_t    icd_count;
    uint32_t    status[128];
#else
#error big endian version not defined
#endif
} sli4_res_common_iscsi_invalidate_cmds_t;


/**
 * @brief COMMON_ISCSI_CFG_POST_SGL_PAGES (v0)
 *
 * Register Scatter-Gather List (SGL) memory
 */
typedef struct sli4_req_common_iscsi_cfg_post_sgl_pages_v0_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    numPages:16,
        page_offset:16;
    uint32_t    rsvd0;
    struct {
        uint32_t    low;
        uint32_t    high;
    } page_physical_address[26];
    uint32_t    rsvd1;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_cfg_post_sgl_pages_v0_t;


/**
 * @brief COMMON_ISCSI_CFG_POST_SGL_PAGES (v1)
 *
 * Register Scatter-Gather List (SGL) memory
 */
typedef struct sli4_req_common_iscsi_cfg_post_sgl_pages_v1_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    icd_start:16,
        icd_count:16;
    struct {
        uint32_t    page0_low;
        uint32_t    page0_high;
    } page_set[20];
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_cfg_post_sgl_pages_v1_t;


/**
 * @brief COMMON_ISCSI_CFG_REMOVE_SGL_PAGES
 *
 * Register Scatter-Gather List (SGL) memory
 */
typedef struct sli4_req_common_iscsi_cfg_remove_sgl_pages_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    rsvd;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_cfg_remove_sgl_pages_t;

/**
 * @brief COMMON_ISCSI_NTWK_IFACE_CREATE
 *
 * Create an interface for a new VLAN
 */
typedef struct sli4_req_common_iscsi_ntwk_iface_create_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    vlan;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_iface_create_t;

typedef struct sli4_res_common_iscsi_ntwk_iface_create_s {
    sli4_res_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    iface;
#else
#error big endian version not defined
#endif
} sli4_res_common_iscsi_ntwk_iface_create_t;

/**
 * @brief COMMON_ISCSI_NTWK_IFACE_DELETE
 *
 * Delete a VLAN interface
 */
typedef struct sli4_req_common_iscsi_ntwk_iface_delete_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    iface;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_iface_delete_t;

typedef struct sli4_res_common_iscsi_ntwk_iface_delete_s {
    sli4_res_hdr_t  hdr;
} sli4_res_common_iscsi_ntwk_iface_delete_t;

/**
 * @brief COMMON_ISCSI_NTWK_CONFIGURE_STATELESS_IP_ADDR
 *
 * Configures a stateless IP address for an interface
 */
typedef struct sli4_req_common_iscsi_ntwk_configure_stateless_ip_addr_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    iface;
    uint32_t    ip_type;
    uint32_t    flags;
    uint32_t    retry_count;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_configure_stateless_ip_addr_t;

/**
 * @brief COMMON_ISCSI_NTWK_RELEASE_STATELESS_IP_ADDR
 *
 * Releases a stateless IP address for an interface
 */
typedef struct sli4_req_common_iscsi_ntwk_release_stateless_ip_addr_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    iface;
    uint32_t    ip_type;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_release_stateless_ip_addr_t;

/**
 * @brief COMMON_ISCSI_NTWK_DISCOVER_ISNS_SERVER
 *
 * Discovers the iSNS server via DHCP
 */
typedef struct sli4_req_common_iscsi_ntwk_discover_isns_server_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    iface;
    uint32_t    retry_count;
    uint32_t    flags;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_discover_isns_server_t;

/**
 * @brief COMMON_ISCSI_NTWK_DISCOVERED_ISNS_SERVERS
 *
 * Retrieves the list of iSNS servers discovered via DHCP
 */
typedef struct sli4_req_common_iscsi_ntwk_discovered_isns_servers_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    iface;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_discovered_isns_servers_t;

typedef struct sli4_res_common_iscsi_ntwk_discovered_isns_servers_s {
    sli4_res_hdr_t  hdr;
    uint32_t ip_count;
    sli4_ip_addr_t ip[8];
} sli4_res_common_iscsi_ntwk_discovered_isns_servers_t;

/**
 * @brief COMMON_ISCSI_NTWK_MODIFY_IP_ADDR
 *
 * Releases a stateless IP address for an interface
 */
typedef struct sli4_req_common_iscsi_ntwk_modify_ip_addr_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    record_count;
    uint32_t    action;
    uint32_t    iface;
    sli4_ip_addr_subnet_t ip_addr_subnet;
    uint32_t    status;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_modify_ip_addr_t;

#define SLI4_ISCSI_ROUTE_TABLE_ENTRIES_MAX  OCS_ISCSI_ROUTE_TABLE_ENTRIES_MAX
#define SLI4_ISCSI_ROUTE_TABLE_ENTRY_ADD    0x01
#define SLI4_ISCSI_ROUTE_TABLE_ENTRY_DEL    0x02

/**
 * @brief COMMON_ISCSI_NTWK_SET_ROUTE_TABLE
 *
 * Set an entry in route table
 */
typedef struct sli4_req_common_iscsi_ntwk_set_route_table_s {
    sli4_req_hdr_t hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t entry_type;
    uint32_t resvd;
    sli4_route_table_entry_t entry[1];
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_set_route_table_t;

typedef struct sli4_res_common_iscsi_ntwk_set_route_table_s {
    sli4_res_hdr_t hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    entry_count;
    uint32_t    resvd;
    sli4_route_table_entry_t entry[1];
#else
#error big endian version not defined
#endif
} sli4_res_common_iscsi_ntwk_set_route_table_t;

/**
 * @brief COMMON_ISCSI_NTWK_GET_ROUTE_TABLE
 *
 * Set an entry in route table
 */
typedef struct sli4_req_common_iscsi_ntwk_get_route_table_s {
    sli4_req_hdr_t hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t entry_type;
    uint32_t resvd;
    sli4_route_table_entry_t entry[SLI4_ISCSI_ROUTE_TABLE_ENTRIES_MAX];
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_get_route_table_t;

typedef struct sli4_res_common_iscsi_ntwk_get_route_table_s {
    sli4_res_hdr_t hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    entry_count;
    uint32_t    resvd;
    sli4_route_table_entry_t entry[SLI4_ISCSI_ROUTE_TABLE_ENTRIES_MAX];
#else
#error big endian version not defined
#endif
} sli4_res_common_iscsi_ntwk_get_route_table_t;

/**
 * @brief COMMON_ISCSI_NTWK_SET_VLAN
 *
 * Set VLAN ID for an interface
 *
 */
typedef struct sli4_req_common_iscsi_ntwk_set_vlan_s {
    sli4_req_hdr_t hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t iface;
    uint32_t vlan_id;
#else
#error big endia version not defined
#endif
} sli4_req_common_iscsi_ntwk_set_vlan_t;

/**
 * @brief COMMON_ISCSI_NTWK_GET_DEFAULT_GATEWAY
 *
 * retrieves the default gateway for an IP type
 */
typedef struct sli4_req_common_iscsi_ntwk_get_default_gateway_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    ip_type;
    uint32_t    resv[5];
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_get_default_gateway_t;

typedef struct sli4_res_iscsi_ntwk_get_default_gateway_s {
    sli4_res_hdr_t  hdr;
    sli4_ip_addr_t gateway;
} sli4_res_common_iscsi_ntwk_get_default_gateway_t;

/**
 * @brief COMMON_ISCSI_NTWK_MODIFY_DEFAULT_GATEWAY
 *
 * adds or delete a default gateway
 */
typedef struct sli4_req_common_iscsi_ntwk_modify_default_gateway_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    action;
    sli4_ip_addr_t gateway;
#else
#error big endian version not defined
#endif
} sli4_req_common_iscsi_ntwk_modify_default_gateway_t;

/**
 * @brief COMMON_ISCSI_NTWK_GET_ALL_IF_ID
 *
 * Retrieves a list of all interfaces.
 */
typedef struct sli4_req_iscsi_ntwk_get_all_if_id_s {
    sli4_req_hdr_t  hdr;
} sli4_req_iscsi_ntwk_get_all_if_id_t;

typedef struct sli4_res_iscsi_ntwk_get_all_if_id_s {
    sli4_res_hdr_t  hdr;
    uint32_t iface_count;
    uint32_t iface[32];
} sli4_res_iscsi_ntwk_get_all_if_id_t;

/**
 * @brief COMMON_ISCSI_NTWK_GET_IF_INFO
 *
 * Retrieves the IP Addresses and VLAN information for an interface.
 */
typedef struct sli4_req_iscsi_ntwk_get_if_info_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t iface;
    uint32_t ip_type;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_ntwk_get_if_info_t;

typedef struct sli4_res_iscsi_ntwk_get_if_info_s {
    sli4_res_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t iface;
    uint32_t vlan_priority;
    uint32_t ip_count;
    uint32_t dhcp_state;
    sli4_ip_addr_subnet_t addr[5];
#else
#error big endian version not defined
#endif
} sli4_res_iscsi_ntwk_get_if_info_t;

/**
 * @brief COMMON_ISCSI_CLEANUP
 *
 * Sent before an unload to allow the SLI port to clean up.
 */
typedef struct sli4_req_iscsi_cleanup_v0_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t ulp:16,
        hdr_ring_id:8,
        data_ring_id:8;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_cleanup_v0_t;

typedef struct sli4_req_iscsi_cleanup_v1_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t ulp:16,
        :16;
    uint32_t hdr_ring_id:16,
        :16;
    uint32_t data_ring_id:16,
        :16;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_cleanup_v1_t;

/**
 * @brief COMMON_ISCSI_SET_FRAGNUM_BITS
 *
 * Allows the host to set the number of SGEs per ICD.
 */
typedef struct sli4_req_iscsi_set_frag_bits_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t num_bits;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_set_frag_bits_t;

/**
 * @brief ISCSI_WQ_CREATE
 *
 * Create a Work Queue for iSCSI use
 */
typedef struct sli4_req_iscsi_wq_create_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    num_pages:16,
        ulp:8,
        dua:1,
        bqu:1,
        rsvd:6;
    struct {
        uint32_t    low;
        uint32_t    high;
    } page_physical_address[8];
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_wq_create_t;

#define SLI4_ISCSI_WQ_CREATE_V0_MAX_PAGES   4

/**
 * @brief ISCSI_WQ_DESTROY
 *
 * Destroy a iSCSI Work Queue
 */
typedef struct sli4_req_iscsi_wq_destroy_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    wq_id;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_wq_destroy_t;

/**
 * @brief ISCSI_NTWK_SET_MTU
 *
 * Sets the maximum transmission unit
 */
typedef struct sli4_req_iscsi_ntwk_set_mtu_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    mtu;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_ntwk_set_mtu_t;

/**
 * @brief ISCSI_TCP_CONNECT_AND_OFFLOAD
 *
 * Open a TCP connection to the specified IP address and TCP port.
 */
typedef struct sli4_req_iscsi_tcp_connect_v0_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    sli4_ip_addr_t ipaddr;
    uint32_t       tcp_port:16,
        cid:16;
    uint32_t       cq_id:16,
        defq_id:16;
    uint32_t    data_out_tmpl_low;
    uint32_t    data_out_tmpl_high;
    uint32_t    hdr_ring_id:16,
        data_ring_id:16;
    uint32_t    do_offload:8,
        :24;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tcp_connect_v0_t;

typedef struct sli4_req_iscsi_tcp_connect_v1_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    sli4_ip_addr_t ipaddr;
    uint32_t       tcp_port:16,
        cid:16;
    uint32_t       cq_id:16,
        defq_id:16;
    uint32_t    data_out_tmpl_low;
    uint32_t    data_out_tmpl_high;
    uint32_t    hdr_ring_id:16,
        data_ring_id:16;
    uint32_t    do_offload:8,
        :24;
    uint32_t    window_size:16,
        window_shift:8,
        :8;
    uint32_t    tcp_mss:24,
        :8;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tcp_connect_v1_t;

typedef struct sli4_res_iscsi_tcp_connect_s {
    sli4_res_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t conn_handle;
    uint32_t cid:16,
        :16;
#else
#error big endian version not defined
#endif
} sli4_res_iscsi_tcp_connect_t;


/**
 * @brief ISCSI_TCP_DISCONNECT
 *
 * Open a TCP connection to the specified IP address and TCP port.
 */
typedef struct sli4_req_iscsi_tcp_disconnect_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t conn_handle;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tcp_disconnect_t;

/**
 * @brief ISCSI_GET_CONNECTION_INFO
 *
 * Retrieves the source/destination IP addresses, ports and MSS
 */
typedef struct sli4_req_iscsi_get_connection_info_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    conn_handle;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_get_connection_info_t;

typedef struct sli4_res_iscsi_get_connection_info_s {
    sli4_res_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    sli4_ip_addr_t src_ip;
    sli4_ip_addr_t dest_ip;
    uint32_t src_port:16,
        dest_port:16;
    uint32_t tcp_mss;
    uint32_t iface;
    uint32_t wscale:8,
        :24;
#else
#error big endian version not defined
#endif
} sli4_res_iscsi_get_connection_info_t;

/**
 * @brief ISCSI_DEFQ_CREATE
 *
 * Create a Receive Queue for iSCSI use
 */
typedef struct sli4_req_iscsi_defq_create_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    num_pages:16,
        ulp:8,
        dua:1,
        bqu:1,
        rsvd:6;
    uint32_t    :16,
        ring_size:4,
        :12;
    uint32_t    rsvd0;
    uint32_t    buffer_size:16,
        cq_id:10,
        :6;
    uint32_t    rsvd1;
    struct {
        uint32_t    low;
        uint32_t    high;
    } page_physical_address[8];
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_defq_create_t;

#define SLI4_ISCSI_DEFQ_CREATE_V0_MAX_PAGES   8
#define SLI4_ISCSI_DEFQ_CREATE_V0_MIN_BUF_SIZE    64
#define SLI4_ISCSI_DEFQ_CREATE_V0_MAX_BUF_SIZE    8192
#define SLI4_ISCSI_DEFQE_SIZE             8

/**
 * @brief ISCSI_DEFQ_DESTROY
 *
 * Destroy a iSCSI Receive Queue
 */
typedef struct sli4_req_iscsi_defq_destroy_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    id;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_defq_destroy_t;

/**
 * iSCSI Initiator opcode (OPC) values
 */
#define SLI4_OPC_ISCSI_INI_INVALIDATE_CONNECTION    0x2A
/**
 * @brief ISCSI_INI_INVALIDATE_CONNECTION
 *
 * Invalidate a connection and optionally send a TCP RST
 */
typedef struct sli4_req_iscsi_ini_invalidate_connection_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    session_handle;
    uint32_t    cid:16,
            :16;
    uint32_t    cleanup_type:16,
            save_config:16;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_ini_invalidate_connection_t;


/**
 * iSCSI Target opcode (OPC) values
 */
#define SLI4_OPC_ISCSI_TGT_START_LISTEN_SERVER      0x01
#define SLI4_OPC_ISCSI_TGT_STOP_LISTEN_SERVER       0x02
#define SLI4_OPC_ISCSI_TGT_GET_CONNECTION_INFO      0x03
#define SLI4_OPC_ISCSI_TGT_CONNECTION_REJECT        0x04
#define SLI4_OPC_ISCSI_TGT_OFFLOAD_CONNECTION       0x05
#define SLI4_OPC_ISCSI_TGT_ISNS_SEND_PACKET     0x06
#define SLI4_OPC_ISCSI_TGT_INVALIDATE_CONNECTION    0x07
#define SLI4_OPC_ISCSI_TGT_START_ESI_LISTEN     0x0B
#define SLI4_OPC_ISCSI_TGT_STOP_ESI_LISTEN      0x0C

/**
 * @brief ISCSI_TGT_START_LISTEN_SERVER
 *
 * Starts a listen server at the specified IP and port
 */
typedef struct sli4_req_iscsi_tgt_start_listen_server_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    sli4_ip_addr_t  ipaddr;
    uint32_t    tcp_port;
    uint32_t    rsvd;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_start_listen_server_t;

/**
 * @brief ISCSI_TGT_STOP_LISTEN_SERVER
 *
 * Stops a listen server at the specified IP and port
 */
typedef struct sli4_req_iscsi_tgt_stop_listen_server_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    sli4_ip_addr_t  ipaddr;
    uint32_t    tcp_port;
    uint32_t    rsvd;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_stop_listen_server_t;

/**
 * @brief ISCSI_TGT_GET_CONNECTION_INFO
 *
 * Retrieves the source/destination IP addresses, ports and MSS
 */
typedef struct sli4_req_iscsi_tgt_get_connection_info_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    conn_handle;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_get_connection_info_t;

typedef struct sli4_res_iscsi_tgt_get_connection_info_s {
    sli4_res_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    sli4_ip_addr_t src_ip;
    sli4_ip_addr_t dest_ip;
    uint32_t src_port:16,
        dest_port:16;
    uint32_t tcp_mss;
#else
#error big endian version not defined
#endif
} sli4_res_iscsi_tgt_get_connection_info_t;

/**
 * @brief ISCSI_TGT_CONNECTION_REJECT
 *
 * Inform the SLI port to close and free the connection.
 */
typedef struct sli4_req_iscsi_tgt_connection_reject_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    conn_handle;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_connection_reject_t;

/**
 * @brief ISCSI_TGT_OFFLOAD_CONNECTION
 *
 * Offloads a new connection and updates the TCP window size.
 */
typedef struct sli4_req_iscsi_tgt_offload_connection_v0_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    conn_handle;
    uint32_t    cid:16,
        cq_id:16;
    uint32_t    hdr_id:8,
        data_id:8,
        ulp_number:16;
    uint32_t    tcp_window;
    uint32_t    nrs:1,
        :31;
    uint32_t    rsvd;
    sli4_target_login_options_t login_options;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_offload_connection_v0_t;

typedef struct sli4_req_iscsi_tgt_offload_connection_v1_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    conn_handle;
    uint32_t    cid:16,
        cq_id:16;
    uint32_t    hdr_id:16,
        :16;
    uint32_t data_id:16,
        :16;
    uint32_t ulp_number:16,
        :16;
    uint32_t    tcp_window;
    uint32_t    nrs:1,
        :31;
    uint32_t    rsvd;
    sli4_target_login_options_t login_options;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_offload_connection_v1_t;

/**
 * @brief ISCSI_TGT_ISNS_SEND_PACKET
 *
 * Stops a listen server at the specified IP and port
 */
typedef struct sli4_req_iscsi_tgt_isns_send_packet_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    sli4_isns_ip_addr_t isns_server;
    uint32_t    pkt_size;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_isns_send_packet_t;

/**
 * @brief ISCSI_TGT_INVALIDATE_CONNECTION
 *
 * Invalidate a connection and optionally send a TCP RST
 */
typedef struct sli4_req_iscsi_tgt_invalidate_connection_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    conn_handle;
    uint32_t    cid:16,
        cleanup_type:16;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_invalidate_connection_t;

/**
 * @brief ISCSI_TGT_START_ESI_LISTEN
 *
 * Starts an ESI listen server at the specified IP and port
 */
typedef struct sli4_req_iscsi_tgt_start_esi_listen_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    sli4_ip_addr_t  ipaddr;
    uint32_t    tcp_port;
    uint32_t    rsvd;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_start_esi_listen_t;

/**
 * @brief ISCSI_TGT_STOP_ESI_LISTEN
 *
 * Stops an ESI listen server at the specified IP and port
 */
typedef struct sli4_req_iscsi_tgt_stop_esi_listen_s {
    sli4_req_hdr_t  hdr;
#if BYTE_ORDER == LITTLE_ENDIAN
    sli4_ip_addr_t  ipaddr;
    uint32_t    tcp_port;
    uint32_t    rsvd;
#else
#error big endian version not defined
#endif
} sli4_req_iscsi_tgt_stop_esi_listen_t;


/**
 * Work Queue Entry (WQE) types
 */
#define SLI4_WQE_INI_WRITE  0x01
#define SLI4_WQE_INI_TMF    0x02
#define SLI4_WQE_INI_NOP    0x03
#define SLI4_WQE_INI_READ   0x05
#define SLI4_WQE_CONTEXT_UPDATE 0x07
#define SLI4_WQE_TGT_STS    0x08
#define SLI4_WQE_TGT_DATAIN 0x09
#define SLI4_WQE_TGT_SOS    0x0A
#define SLI4_WQE_UNASSISTED 0x0B

#define SLI4_ISCSI_WQE_SIZE         64
/* WQE DIF Modes */
#define SLI4_WQE_DIF_MODE_DISABLED  0x00
#define SLI4_WQE_DIF_MODE_PASS_THRU 0x01
#define SLI4_WQE_DIF_MODE_REMOVE    0x02
#define SLI4_WQE_DIF_MODE_INSERT    0x03

/* WQE DIF block sizes */
#define SLI4_WQE_DIF_BLK_SIZE_512   0x00
#define SLI4_WQE_DIF_BLK_SIZE_1024  0x01
#define SLI4_WQE_DIF_BLK_SIZE_2048  0x02
#define SLI4_WQE_DIF_BLK_SIZE_4096  0x03
#define SLI4_WQE_DIF_BLK_SIZE_520   0x04
#define SLI4_WQE_DIF_BLK_SIZE_4104  0x05

/**
 * @brief Asynchronouse Event : Link State ACQE
 */
typedef struct sli4_link_state_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    link_number:8,
        attn_type:8,
        port_duplex:8,
        port_speed:8;
    uint32_t    port_fault:8,
        :8,
        logical_link_speed:16;
    uint32_t    event_tag;
uint32_t    :8,
        event_code:8,
        event_type:8,   /** values are protocol specific */
        :6,
        ae:1,       /** async event - this is an ACQE */
        val:1;      /** valid - contents of CQE are valid */
#else
#error big endian version not defined
#endif
} sli4_link_state_t;

#define ISCSI_CQE_CODE_NORMAL            0x01
#define ISCSI_CQE_CODE_CMD_DIGEST_ERROR      0x02
#define ISCSI_CQE_CODE_RECV_PDU_DSL_ERROR    0x03
#define ISCSI_CQE_CODE_RECV_SEQ_BURST_ERROR  0x04
#define ISCSI_CQE_CODE_RECV_AHS_NOT_SUPPORTED    0x05
#define ISCSI_CQE_CODE_HDR_DIGEST_ERROR      0x06
#define ISCSI_CQE_CODE_OPCODE_ERROR      0x07
#define ISCSI_CQE_CODE_ITT_TTT_WRONG_CXN     0x08
#define ISCSI_CQE_CODE_ITT_TTT_TOO_BIG       0x09
#define ISCSI_CQE_CODE_TCP_RECV_RST      0x0A
#define ISCSI_CQE_CODE_TCP_TIMEOUT       0x0B
#define ISCSI_CQE_CODE_TCP_SENT_RST      0x0C
#define ISCSI_CQE_CODE_TCP_RECV_FIN      0x0D
#define ISCSI_CQE_CODE_BAD_UNSOL_PDU         0x0E
#define ISCSI_CQE_CODE_BAD_WQE_INDEX         0x0F
#define ISCSI_CQE_CODE_RESIDUAL_OVERRUN      0x10
#define ISCSI_CQE_CODE_RESIDUAL_UNDERRUN     0x11
#define ISCSI_CQE_CODE_INVALID_STATSN        0x12
#define ISCSI_CQE_CODE_R2T_INVALID_FIELDS    0x13
#define ISCSI_CQE_CODE_INVALID_LUN       0x14
#define ISCSI_CQE_CODE_INVALID_ICD_STATE     0x15
#define ISCSI_CQE_CODE_RECV_PDU_INVALID_ITT  0x16
#define ISCSI_CQE_CODE_RECV_SEQ_BUF_OUT_OF_ORDER 0x17
#define ISCSI_CQE_CODE_RECV_PDU_INVALID_DATASN   0x18
#define ISCSI_CQE_CODE_HOST_CXN_INVALIDATION     0x19
#define ISCSI_CQE_CODE_HOST_CXN_INVL_WITH_PDU    0x1A
#define ISCSI_CQE_CODE_HOST_CMD_INVALIDATION     0x1B
#define ISCSI_CQE_CODE_UNSOL_HDR_NOTIFY      0x1C
#define ISCSI_CQE_CODE_UNSOL_DATA_NOTIFY     0x1D
#define ISCSI_CQE_CODE_UNSOL_DATA_DIGEST_ERROR   0x1E
#define ISCSI_CQE_CODE_TCP_ACK           0x1F
#define ISCSI_CQE_CODE_CMD_DATA_DIFF_CXN     0x20
#define ISCSI_CQE_CODE_DIF_ERROR         0x21
#define ISCSI_CQE_CODE_RECV_UNSOL_PDU_ERROR  0x22
#define ISCSI_CQE_CODE_TX_DIF_ERR_CQE        0x23
#define ISCSI_CQE_CODE_MAX           0x23

#define SLI4_ISCSI_ACQE_NEW_TCP_CONNECTION          0x10
#define SLI4_ISCSI_ACQE_STATELESS_OPERATION_COMPLETE_IPV4   0x20
#define SLI4_ISCSI_ACQE_STATELESS_OPERATION_COMPLETE_IPV6   0x40
#define SLI4_ISCSI_ACQE_DHCP_OPERATION_COMPLETE         0x80
#define SLI4_ISCSI_ACQE_ICMPV6_ERROR_PKT_RECVD          0x83
#define SLI4_ISCSI_ACQE_IPV6_DEFAULT_PORT_MTU_CHANGED       0x86

/**
 * @brief Asynchronouse Event : iSCSI Event
 */
typedef struct sli4_iscsi_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    rsvd0[3];
uint32_t    :8,
        event_code:8,
        event_type:8,   /** values are protocol specific */
        :6,
        ae:1,       /** async event - this is an ACQE */
        val:1;      /** valid - contents of CQE are valid */
#else
#error big endian version not defined
#endif
} sli4_iscsi_t;

/**
 * @brief Asynchronouse Event : iSCSI Event - New TCP Connection
 */
typedef struct sli4_iscsi_new_tcp_cnx_accepted_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    cid;
    uint32_t    rsvd0[2];
uint32_t    :8,
        event_code:8,
        event_type:8,   /** values are protocol specific */
        :6,
        ae:1,       /** async event - this is an ACQE */
        val:1;      /** valid - contents of CQE are valid */
#else
#error big endian version not defined
#endif
} sli4_iscsi_new_tcp_cnx_accepted_t;

/**
 * @brief Asynchronouse Event : iSCSI Event - stateless operation complete
 */
typedef struct sli4_iscsi_stateless_op_cmpl_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    status:8,
        additional_status:8,
        :16;
    uint32_t    iface;
    uint32_t    rsvd0;
uint32_t    :8,
        event_code:8,
        event_type:8,   /** values are protocol specific */
        :6,
        ae:1,       /** async event - this is an ACQE */
        val:1;      /** valid - contents of CQE are valid */
#else
#error big endian version not defined
#endif
} sli4_iscsi_stateless_op_cmpl_t;

/**
 * @brief Asynchronouse Event : iSCSI Event - DHCP operation complete
 */
typedef struct sli4_iscsi_dhcp_op_cmpl_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    status:8,
        additional_status:8,
        :16;
    uint32_t    iface;
    uint32_t    rsvd0;
uint32_t    :8,
        event_code:8,
        event_type:8,   /** values are protocol specific */
        :6,
        ae:1,       /** async event - this is an ACQE */
        val:1;      /** valid - contents of CQE are valid */
#else
#error big endian version not defined
#endif
} sli4_iscsi_dhcp_op_cmpl_t;

/**
 * @brief Asynchronouse Event : iSCSI Event - iCMPv6 Error
 */
typedef struct sli4_iscsi_icmpv6_error_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    iface;
    uint32_t    error_code:8,
        :24;
    uint32_t    rsvd0;
uint32_t    :8,
        event_code:8,
        event_type:8,   /** values are protocol specific */
        :6,
        ae:1,       /** async event - this is an ACQE */
        val:1;      /** valid - contents of CQE are valid */
#else
#error big endian version not defined
#endif
} sli4_iscsi_icmpv6_error_t;

/**
 * @brief Asynchronouse Event : iSCSI Event - iCMPv6 Error
 */
typedef struct sli4_iscsi_port_mtu_changed_s {
#if BYTE_ORDER == LITTLE_ENDIAN
    uint32_t    new_mtu;
    uint32_t    rsvd0[2];
uint32_t    :8,
        event_code:8,
        event_type:8,   /** values are protocol specific */
        :6,
        ae:1,       /** async event - this is an ACQE */
        val:1;      /** valid - contents of CQE are valid */
#else
#error big endian version not defined
#endif
} sli4_iscsi_port_mtu_changed_t;

typedef struct sli4_iscsi_common_cqe_s {
    uint32_t rsvd1;
    uint32_t rsvd2;
    uint32_t code:6,
         :26;
    uint32_t rsvd3;
} sli4_iscsi_common_cqe_t;
/**
 * @brief iSCSI Event Types
 */
#define SLI4_LINK_STATE_PHYSICAL    0x00
#define SLI4_LINK_STATE_LOGICAL     0x01

#define SLI4_GRP5_QOS_SPEED     0x01

#define SLI4_PORT_SPEED_NO_LINK     0x0
#define SLI4_PORT_SPEED_10_MBPS     0x1
#define SLI4_PORT_SPEED_100_MBPS    0x2
#define SLI4_PORT_SPEED_1_GBPS      0x3
#define SLI4_PORT_SPEED_10_GBPS     0x4

#define SLI4_PORT_DUPLEX_NONE       0x0
#define SLI4_PORT_DUPLEX_HALF       0x1
#define SLI4_PORT_DUPLEX_FULL       0x2

#define SLI4_PORT_LINK_STATUS_DOWN  0x0
#define SLI4_PORT_LINK_STATUS_UP    0x1


/**
 * Code definitions applicable to all FC/FCoE CQE types
 */
#define SLI4_CQE_CODE_OFFSET        14

#define SLI4_CQE_CODE_WORK_REQUEST_COMPLETION   0x01
#define SLI4_CQE_CODE_RQ_ASYNC      0x04
typedef int32_t cqe_handler_t(sli4_t *, uint8_t *cqe,
                              sli4_qentry_fields_t *fields);

typedef struct sli_wqe_handlers {
        int32_t (*wqe_update_context)(sli4_t *sli4, void *buf, size_t size,
                                ocs_hal_target_login_options_t *lgn_options,
                                uint32_t statsn);

        int32_t (*wqe_ini_read)(sli4_t *sli4, void *buf, size_t size,
                                uint16_t lun, uint32_t exp_xfer_len,
                                uint32_t cmdsn, uint16_t icd_index,
                ocs_hal_dif_info_t* dif_info,
                                sli4_sge_t *sgl, uint32_t n_sge);

        int32_t (*wqe_ini_write)(sli4_t *sli4, void *buf, size_t size,
                                uint16_t lun, uint32_t exp_xfer_len,
                                uint32_t cmdsn, uint16_t icd_index,
                 ocs_hal_dif_info_t* dif_info,
                                sli4_sge_t *sgl, uint32_t n_sge);

        int32_t (*wqe_ini_nop)(sli4_t *sli4, void *buf, size_t size,
                                uint8_t dm, uint32_t cmdsn, ocs_dma_t *bhs,
                                ocs_dma_t *payload1, ocs_dma_t *payload2,
                                uint32_t exp_xfer_len, uint16_t icd_index);

        int32_t (*wqe_ini_tmf)(sli4_t *sli4, void *buf, size_t size,
                               uint16_t lun, uint32_t cmdsn, uint16_t icd_index,
                               sli4_sge_t *sgl, uint32_t n_sge);

        int32_t (*wqe_tgt_datain)(sli4_t *sli4, void *buf, size_t size,
                                ocs_dma_t *bhs, uint16_t lun, uint8_t dm,
                                uint8_t underrun, uint8_t overrun,
                                uint32_t exp_xfer_len, uint16_t icd_index,
                                uint16_t ref_icd_index, uint32_t data_sn,
                                uint8_t piggy_back_status,
                  ocs_hal_dif_info_t* dif_info,
                  sli4_sge_t *sgl, uint32_t n_sge);

        int32_t (*wqe_tgt_sts)(sli4_t *sli4, void *buf, size_t size,
                                ocs_dma_t *bhs, uint16_t lun,
                                uint32_t exp_xfer_len, uint32_t exp_data_sn,
                                uint32_t itt, uint16_t icd_index,
                                uint16_t ref_icd_index,
                   ocs_hal_dif_info_t* dif_info,
                   uint32_t r2t_offset, sli4_sge_t *sgl, uint32_t n_sge);

        int32_t (*wqe_tgt_sos)(sli4_t *sli4, void *buf, size_t size,
                                ocs_dma_t *bhs, ocs_dma_t *payload1,
                                ocs_dma_t *payload2, uint16_t lun, uint8_t dm,
                                uint32_t exp_xfer_len, uint16_t icd_index);

        int32_t (*wqe_unassisted)(sli4_t *sli4, void *buf, size_t size,
                                uint8_t set_dm, uint8_t incr_statsn,
                                uint8_t is_login, ocs_dma_t *bhs,
                                ocs_dma_t *payload1, ocs_dma_t *payload2,
                                uint32_t exp_xfer_len, uint16_t icd_index);

    int32_t (*queue_iscsi_wq_write)(sli4_t *sli4, sli4_queue_t *q,
                        uint8_t *entry, void *io);

    int32_t (*queue_iscsi_wqe_invalidate)(sli4_t *sli4, sli4_queue_t *q,
                          void *io, uint8_t is_for_tm);
} sli_wqe_handlers_t;

int32_t sli_cmd_iscsi_common_get_route_table(sli4_t *sli4, void *buf, size_t size,
                         uint64_t tag, ocs_dma_t *dma);
int32_t sli_cmd_iscsi_common_set_route_table(sli4_t *sli4, void *buf, size_t size,
                         uint64_t tag, uint8_t isadd,
                         ocs_hal_ip_address_subnet_t *hal_ipsub,
                         ocs_hal_ip_address_t *hal_gateway,
                         ocs_dma_t *dma);
extern int32_t sli_iscsi_process_link_state(sli4_t *, void *);
extern int32_t sli_iscsi_process_iscsi(sli4_t *, void *);
extern int32_t sli_iscsi_cqe_parse(sli4_t *, sli4_queue_t *, uint8_t *, sli4_qentry_fields_t *);
extern uint32_t sli_iscsi_response_length(sli4_t *, uint8_t *);
extern int32_t sli_iscsi_set_frag_bits(sli4_t *);
extern int32_t sli_iscsi_post_sgl_pages(sli4_t *);
extern int32_t sli_iscsi_io_get_icd_and_sgl(sli4_t *, uint32_t, uint16_t*, void**);
extern uint32_t sli_iscsi_io_length(sli4_t *, uint8_t *);
extern uint8_t sli_iscsi_conv_hal_ip_addr_type(ocs_hal_ip_type_e ip_type);
extern ocs_hal_ip_type_e sli_iscsi_conv_sli4_ip_addr_type(uint8_t ip_type);
extern int32_t sli_cmd_iscsi_common_iface_create(sli4_t *, void *, size_t, uint64_t, uint32_t);
extern int32_t sli_cmd_iscsi_common_iface_delete(sli4_t *, void *, size_t, uint64_t, uint32_t);
extern int32_t sli_cmd_iscsi_common_configure_stateless_ip_addr(sli4_t *sli4, void *buf,
                                size_t size, uint64_t tag,
                                uint32_t iface, uint8_t isv4,
                                uint32_t retries);
extern int32_t sli_cmd_iscsi_common_release_stateless_ip_addr(sli4_t *sli4, void *buf,
                                  size_t size, uint64_t tag,
                                  uint32_t iface, uint8_t isv4);
extern int32_t sli_cmd_iscsi_common_discover_isns_server(sli4_t *sli4, void *buf,
                             size_t size, uint64_t tag,
                             uint32_t iface, uint32_t retries);
extern int32_t sli_cmd_iscsi_common_discovered_isns_servers(sli4_t *sli4, void *buf,
                                size_t size, uint64_t tag,
                                uint32_t iface);
extern int32_t sli_cmd_iscsi_common_modify_ip_addr(sli4_t *sli4, void *buf,
                           size_t size, uint64_t tag,
                           uint32_t iface, uint8_t isadd,
                           ocs_hal_ip_address_subnet_t *ipaddr);
extern int32_t sli_cmd_iscsi_common_get_default_gateway(sli4_t *sli4, void *buf,
                            size_t size, uint64_t tag,
                            uint8_t isv4);
extern int32_t sli_cmd_iscsi_common_modify_default_gateway(sli4_t *sli4, void *buf,
                               size_t size, uint64_t tag,
                               uint8_t isadd,
                               ocs_hal_ip_address_t *gateway);
extern int32_t sli_cmd_iscsi_common_get_all_if_id(sli4_t *, void *, size_t, uint64_t);
extern int32_t sli_cmd_iscsi_common_get_if_info(sli4_t *, void *, size_t, uint64_t, uint32_t, uint8_t);
extern int32_t sli_cmd_iscsi_cleanup_v0(sli4_t *sli4, void *buf,
                    size_t size, uint64_t tag,
                    uint16_t ulp_no,
                    uint8_t  hdrq_id,
                    uint8_t  dataq_id);
extern int32_t sli_cmd_iscsi_cleanup_v1(sli4_t *sli4, void *buf,
                    size_t size, uint64_t tag,
                    uint16_t ulp_no,
                    uint16_t  hdrq_id,
                    uint16_t  dataq_id);
extern int32_t sli_cmd_iscsi_tgt_start_listen_server(sli4_t *sli4, void *buf,
                             size_t size, uint64_t tag,
                             ocs_hal_ip_address_t *ipaddr,
                             uint32_t tcp_port);
extern int32_t sli_cmd_iscsi_tgt_stop_listen_server(sli4_t *sli4, void *buf,
                            size_t size, uint64_t tag,
                            ocs_hal_ip_address_t *ipaddr,
                            uint32_t tcp_port);
extern int32_t sli_cmd_iscsi_tgt_get_connection_info(sli4_t *sli4, void *buf,
                             size_t size, uint64_t tag,
                             uint32_t conn_hdl);

extern int32_t sli_cmd_iscsi_tcp_connect_v0(sli4_t *sli4, void *buf,
                        size_t size, uint64_t tag,
                        ocs_hal_ip_address_t *ipaddr,
                        uint32_t   tcp_port,
                        uint16_t   cid,
                        uint16_t   cq_id,
                        ocs_dma_t *data_out,
                        uint16_t   hdr_ring_id,
                        uint16_t   data_ring_id,
                        uint8_t    do_offload);

extern int32_t sli_cmd_iscsi_tcp_connect_v1(sli4_t *sli4, void *buf,
                        size_t size, uint64_t tag,
                        ocs_hal_ip_address_t *ipaddr,
                        uint32_t   tcp_port,
                        uint16_t   cid,
                        uint16_t   cq_id,
                        ocs_dma_t *data_out,
                        uint16_t   hdr_ring_id,
                        uint16_t   data_ring_id,
                        uint8_t    do_offload,
                        uint16_t   window_size,
                        uint8_t    window_scale,
                        uint32_t   tcp_mss);

extern int32_t sli_cmd_iscsi_tcp_disconnect(sli4_t *sli4, void *buf,
                        size_t size, uint64_t tag,
                        uint32_t   conn_handle);

extern int32_t sli_cmd_iscsi_get_connection_info(sli4_t *sli4, void *buf,
                         size_t size, uint64_t tag,
                         uint32_t conn_hdl);

extern int32_t sli_cmd_iscsi_tgt_connection_reject(sli4_t *sli4, void *buf,
                           size_t size, uint64_t tag,
                           uint32_t conn_hdl);

extern int32_t sli_cmd_iscsi_tgt_offload_connection_v0(sli4_t *sli4, void *buf,
                               size_t size, uint64_t tag,
                               uint32_t conn_hdl,
                               uint32_t tcp_window_size,
                               uint16_t ulp_no,
                               uint16_t wq_id,
                               uint16_t cq_id,
                               uint8_t  hdrq_id,
                               uint8_t  dataq_id,
                               uint8_t  nrs,
                               ocs_hal_target_login_options_t *lgn_options);
extern int32_t sli_cmd_iscsi_tgt_offload_connection_v1(sli4_t *sli4, void *buf,
                               size_t size, uint64_t tag,
                               uint32_t conn_hdl,
                               uint32_t tcp_window_size,
                               uint16_t ulp_no,
                               uint16_t wq_id,
                               uint16_t cq_id,
                               uint16_t hdrq_id,
                               uint16_t dataq_id,
                               uint8_t  nrs,
                               ocs_hal_target_login_options_t *lgn_options);
extern int32_t sli_cmd_iscsi_tgt_invalidate_connection(sli4_t *sli4, void *buf,
                               size_t size, uint64_t tag,
                               uint32_t conn_hdl,
                               uint16_t cid,
                               uint8_t  sendRst);
extern int32_t sli_cmd_iscsi_tgt_start_esi_listen(sli4_t *sli4, void *buf,
                          size_t size, uint64_t tag,
                          ocs_hal_ip_address_t *ipaddr,
                          uint32_t tcp_port);
extern int32_t sli_cmd_iscsi_tgt_stop_esi_listen(sli4_t *sli4, void *buf,
                         size_t size, uint64_t tag,
                         ocs_hal_ip_address_t *ipaddr,
                         uint32_t tcp_port);
extern int32_t sli_cmd_iscsi_ini_invalidate_connection(sli4_t *sli4, void *buf,
                               size_t size, uint64_t tag,
                               uint32_t conn_hdl,
                               uint16_t cid,
                               uint8_t  sendRst);
extern int32_t sli_cmd_iscsi_tgt_isns_send_packet(sli4_t *sli4, void *buf,
                          size_t size, uint64_t tag,
                          ocs_hal_ip_address_t *isns_server,
                          uint32_t tcp_port,
                          void *packet,
                          uint32_t   pkt_length,
                          ocs_dma_t *pkt_mem);
extern int32_t sli_cmd_iscsi_wq_create(sli4_t *, void *, size_t, uint64_t, ocs_dma_t *, uint16_t, uint16_t);
extern int32_t sli_cmd_iscsi_wq_destroy(sli4_t *, void *, size_t, uint64_t, uint16_t);
extern int32_t sli_cmd_iscsi_ntwk_set_mtu(sli4_t *sli4, void *buf, size_t size, uint64_t tag,
                      uint32_t mtu);
extern int32_t sli_cmd_iscsi_invalidate_cmds(sli4_t *sli4, void *buf,
                         size_t size, uint64_t tag,
                         ocs_dma_t *msg_mem,
                         ocs_hal_io_t **ios,
                         uint16_t num_ios,
                         ocs_hal_abort_type_e abort_type);
extern int32_t sli_cmd_iscsi_remove_sgl_pages(sli4_t *, void *, size_t, uint64_t);
extern int32_t sli_cmd_iscsi_defq_create(sli4_t *, void *, size_t, uint64_t, ocs_dma_t *, uint32_t, uint16_t, uint16_t, uint16_t);
extern int32_t sli_cmd_iscsi_defq_destroy(sli4_t *, void *, size_t, uint64_t, uint16_t);
extern int32_t sli_iscsi_defq_alloc(sli4_t *, sli4_queue_t *, sli4_queue_t *, uint32_t, uint32_t, uint32_t, sli4_queue_t *, uint16_t);

extern int32_t sli_wqe_ini_write(sli4_t *sli4, void *buf, size_t size,
                 uint16_t   lun,
                 uint32_t   exp_xfer_len,
                 uint32_t   cmdsn,
                 uint16_t   icd_index,
                 ocs_hal_dif_info_t* dif_info,
                 sli4_sge_t *sgl,
                 uint32_t    n_sge);

extern int32_t sli_wqe_ini_tmf(sli4_t *sli4, void *buf, size_t size,
                   uint16_t   lun,
                   uint32_t   cmdsn,
                   uint16_t   icd_index,
                   sli4_sge_t *sgl,
                   uint32_t    n_sge);

extern int32_t sli_wqe_ini_nop(sli4_t *sli4, void *buf, size_t size,
                   uint8_t    dm,
                   uint32_t   cmdsn,
                   ocs_dma_t *bhs,
                   ocs_dma_t *payload1,
                   ocs_dma_t *payload2,
                   uint32_t   exp_xfer_len,
                   uint16_t   icd_index);

extern int32_t sli_wqe_ini_read(sli4_t *sli4, void *buf, size_t size,
                uint16_t   lun,
                uint32_t   exp_xfer_len,
                uint32_t   cmdsn,
                uint16_t   icd_index,
                ocs_hal_dif_info_t* dif_info,
                sli4_sge_t *sgl,
                uint32_t    n_sge);

extern int32_t sli_wqe_update_context(sli4_t *sli4, void *buf, size_t size,
                      ocs_hal_target_login_options_t *lgn_options,
                      uint32_t statsn);

extern int32_t sli_wqe_tgt_sts(sli4_t *sli4, void *buf, size_t size,
                   ocs_dma_t *bhs,
                   uint16_t   lun,
                   uint32_t   exp_xfer_len,
                   uint32_t   exp_data_sn,
                   uint32_t   itt,
                   uint16_t   icd_index,
                   uint16_t   ref_icd_index,
                   ocs_hal_dif_info_t* dif_info,
                   uint32_t   r2t_offset);

extern int32_t sli_wqe_tgt_datain(sli4_t *sli4, void *buf, size_t size,
                  ocs_dma_t *bhs,
                  uint16_t   lun,
                  uint8_t    dm,
                  uint8_t    underrun,
                  uint8_t    overrun,
                  uint32_t   exp_xfer_len,
                  uint16_t   icd_index,
                  uint16_t   ref_icd_index,
                  uint32_t   data_sn,
                  uint8_t    piggy_back_status,
                  ocs_hal_dif_info_t* dif_info,
                  sli4_sge_t *sgl,
                  uint32_t    n_sge);

extern int32_t sli_wqe_tgt_sos(sli4_t *sli4, void *buf, size_t size,
                   ocs_dma_t *bhs,
                   ocs_dma_t *payload1,
                   ocs_dma_t *payload2,
                   uint16_t   lun,
                   uint8_t    dm,
                   uint32_t   exp_xfer_len,
                   uint16_t   icd_index);

extern int32_t sli_wqe_unassisted(sli4_t *sli4, void *buf, size_t size,
                  uint8_t set_dm,
                  uint8_t incr_statsn,
                  uint8_t is_login,
                  ocs_dma_t *bhs,
                  ocs_dma_t *payload1,
                  ocs_dma_t *payload2,
                  uint32_t   exp_xfer_len,
                  uint16_t   icd_index);

#include "sli4_skh_iscsi.h"
#include "sli4_be3_iscsi.h"

#endif /* !_SLI4_ISCSI_H */

/* vim: set noexpandtab textwidth=120: */

 /**
 * @page iscsi_sli4_api_overview SLI-4 APIs
 * - @ref sli
 * - @ref sli_iscsi
 * - @ref sli_be3_iscsi
 *
 * <div class="overview">
 * <img src="elx_iscsi_sli4.jpg" alt="iSCSI SLI-4" title="iSCSI SLI-4" align="right"/>
 *
 * <h2>iSCSI SLI-4</h2>
 *
 * The iSCSI SLI-4 component implements the commands and processing defined by
 * the <i>SLI-4 Architecture Specification</i> and the <i>SLI-4 iSCSI Command Reference</i>
 * through a lightly-abstracted API. The primary objective of this component is to provide
 * a mechanism to access the Emulex SLI-4 hardware without enforcing a
 * specific policy.<br><br>
 *
 * All meaningful communication between the driver and hardware occurs via queues. To
 * issue commands and work requests to the hardware, the driver writes work queue
 * entries (WQEs). Conversely, to get information about asynchronous events (for
 * example, link events or previously submitted commands), the driver reads queue
 * entries created by the hardware. The SLI component defines a set of common queue
 * operations used to interact with the hardware, simplifying some of the underlying
 * interface complexities. You can use the queue API to perform the following operations:
 *
 * <ul><li>Allocating a queue type with the given number of entries. Since most queues
 * are closely coupled to an associated queue (for example, a completion queue is
 * tied to an event queue), this interface allows specifying the associated queue.
 * <li>Freeing a previously-allocated queue.</li>
 * <li>Determining if the next queue entry is valid (that is, the hardware has written a
 * new entry).</li>
 * <li>Reading the next valid entry from the queue to a supplied buffer.</li>
 * <li>Writing an entry from a supplied buffer to the next
 * available queue location.</li></ul>
 *
 * The SLI-4 documentation defines registers that are predominantly used in conjunction
 * with the previously mentioned queue operations. One exception to this
 * characterization of SLI-4 registers is the bootstrap mailbox register (bmbx). The
 * bootstrap mailbox register allows the driver to send commands before any of the other
 * queues exist. Similar to the standard queue operations, the SLI component encapsulates
 * the standard mechanism used to communicate via the bootstrap mailbox.<br><br>
 *
 * The OneCore Storage driver writes two types of queue entries: commands and I/O
 * work requests. In both cases, the SLI-4 component provides helper functions to
 * correctly format these queue entries.<br><br>
 *
 * The basic format of the command helper functions includes:
 *
 * <ul><li>A name corresponding to the SLI-4 documentation. For example, the helper
 * function for the FW_INITIALIZE mailbox command is sli_cmd_fw_initialize().</li>
 * <li>A buffer to hold the formatted queue entry.</li>
 * <li>The size of the allocated buffer.</li>
 * <li>Parameter options, where appropriate. For example, the ISCSI_TCP_DISCONNECT
 * command requires a value for the connection handle. Therefore, the
 * sli_cmd_iscsi_tcp_disconnect function provides an additional parameter
 * to supply the value.</li></ul>
 *
 * The basic format of the I/O work request helper functions follow a similar format, and
 * includes:
 *
 * <ul><li>A name corresponding to the SLI-4 documentation. For example, the helper
 * function to create an INITIATOR_WRITE_COMMAND WQE is sli_be3_wqe_ini_write().</li>
 * <li>A buffer to hold the formatted queue entry.</li>
 * <li>The size of the allocated buffer.</li>
 * <li>Parameterized command options where appropriate. For example, the
 * INITIATOR_WRITE_COMMAND WQE requires values for the LUN, expected
 * transfer length, and so on. Therefore, the sli_be3_wqe_ini_write function has
 * additional parameters for these fields.</li></ul>
 *
 * Once formatted with a helper function, the queue entry can be passed to
 * sli_queue_write() to post it to the hardware.<br><br>
 *
 * @b Note: The formatted command buffers may also be passed to the hardware through
 * the bootstrap mailbox interface (sli_bmbx_command()).<br><br>
 *
 * The SLI-4 component provides assistance in decoding entries created by the hardware
 * and read by the driver. In some cases, a SLI-4 function receives the raw buffer as input,
 * and then returns more relevant values. For example, the sli_cq_parse() function
 * receives the completion queue entry as input, and then returns the completion type and
 * queue ID. In other cases, the parsing function decodes the queue entry, and then
 * returns the results through registered callback functions. For example, the
 * sli_cqe_async() helper function decodes asynchronous events, such as link events
 * The drivers can register callback functions for each of these
 * events using the SLI component.<br><br>
 *
 * In contrast to SLI-2 and SLI-3 drivers, SLI-4 drivers play a greater role in the allocation
 * and assignment of hardware resources (for example, XRI, RPI, and VPI). However, the
 * inner workings of these resources differ between different hardware. The SLI-4
 * component encapsulates these differences and presents a common interface to upper
 * layers. The API presents a simple allocate or free interface.<br><br>
 *
 * The <i>SLI-4 Architecture Specification</i> covers a range of hardware,
 * each with different capabilities. The SLI
 * component API provides functions to manage these differences. These functions allow
 * drivers to query hardware capabilities (for example, the maximum SGL length), as well
 * as configure capabilities (for example, setting the maximum number of connections
 * or I/O objects).
 * <br><br>
 * </div><!-- overview -->
 */