ocs_gendump.c

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/*
 * Copyright (c) 2011-2015, Emulex
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 *
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 *    this list of conditions and the following disclaimer in the documentation
 *    and/or other materials provided with the distribution.
 *
 * 3. Neither the name of the copyright holder nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 */

#include "ocs.h"
#include "ocs_gendump.h"

#define OCS_XPORT_QUIESCED_TIMEOUT_MSEC     60000

int32_t
ocs_port_reset(ocs_t *ocs)
{
    int rc = 0;

    if (ocs_hal_reset(&ocs->hal, OCS_HAL_RESET_FUNCTION)) {
        ocs_log_err(ocs, "Failed to reset port\n");
        rc = -1;
    } else {
        ocs_log_info(ocs, "Successfully reset port\n");

        /* now initialize hal so user can read the dump in */
        if (ocs_hal_init(&ocs->hal)) {
            ocs_log_err(ocs, "Failed to initialize hal\n");
            rc = -1;
        } else {
            ocs_log_info(ocs, "Successfully initialized hal\n");
        }
    }

    return rc;
}

/* Reset all the functions associated with a bus/dev */
int32_t
ocs_adapter_reset(ocs_t *ocs)
{
    ocs_t *other_ocs = NULL;
    uint8_t bus, dev, func;
    int rc = 0;
    uint32_t index = 0;

    ocs_get_bus_dev_func(ocs, &bus, &dev, &func);
    while ((other_ocs = ocs_get_instance(index++)) != NULL) {
        uint8_t other_bus, other_dev, other_func;

        ocs_get_bus_dev_func(other_ocs, &other_bus, &other_dev, &other_func);
        if ((bus == other_bus) && (dev == other_dev)) {
            if (0 != ocs_port_reset(other_ocs)) {
                rc = -1;
            }
        }
    }

    return rc;
}

int32_t
ocs_fw_reset(ocs_t *ocs)
{
    ocs_t *other_ocs;
    uint8_t bus, dev, func;
    uint8_t other_bus, other_dev, other_func;
    uint8_t prev_port_state[OCS_MAX_HBA_PORTS] = { 0 };
    int32_t rc = 0;
    uint32_t ms_waited = 0;
    uint32_t index = 0, port_index = 0;
    ocs_xport_stats_t status;

    /* Stop FC statistics timers */
    ocs_device_stop_stats_timers(ocs);
    ocs_get_bus_dev_func(ocs, &bus, &dev, &func);

    /* Drop link on all ports */
    while ((other_ocs = ocs_get_instance(index++)) != NULL) {
        ocs_get_bus_dev_func(other_ocs, &other_bus, &other_dev, &other_func);
        if ((bus == other_bus) && (dev == other_dev) && (port_index < OCS_MAX_HBA_PORTS)) {
            /* Check the current link status and save for future use */
            if (0 == ocs_xport_status(other_ocs->xport, OCS_XPORT_PORT_STATUS, &status)) {
                if (OCS_XPORT_PORT_ONLINE == status.value) {
                    prev_port_state[port_index] = 1;
                } else {
                    prev_port_state[port_index] = 0;
                }
            }
            port_index++;
        }
    }

    index = 0;
    /* Wait until all ports have quiesced */
    while ((other_ocs = ocs_get_instance(index++)) != NULL) {
        ocs_get_bus_dev_func(other_ocs, &other_bus, &other_dev, &other_func);
        if ((bus == other_bus) && (dev == other_dev)) {
            for (;;) {
                ocs_xport_status(other_ocs->xport, OCS_XPORT_IS_QUIESCED, &status);
                if (status.value) {
                    ocs_log_debug(other_ocs, "Port quiesced\n");
                    break;
                }

                ocs_delay_usec(10000);
                ms_waited += 10;
                if (ms_waited > OCS_XPORT_QUIESCED_TIMEOUT_MSEC) {
                    ocs_log_err(other_ocs, "Timed out waiting for port to quiesce\n");
                    break;
                }
            }
        }
    }

    ocs_log_info(ocs, "Resetting firmware\n");
    if (ocs_hal_reset(&ocs->hal, OCS_HAL_RESET_FIRMWARE)) {
        ocs_log_err(ocs, "Firmware reset NOT successful\n");
        return -1;
    }
    ocs_log_info(ocs, "Firmware reset successful\n");

    index = 0;
    /* Re-attach all the pci functions on this adapter */
    while ((other_ocs = ocs_get_instance(index++)) != NULL) {
        ocs_get_bus_dev_func(other_ocs, &other_bus, &other_dev, &other_func);
        if ((bus == other_bus) && (dev == other_dev)) {
            if (OCS_HAL_STATE_UNINITIALIZED != other_ocs->hal.state) {
                other_ocs->hal.state = OCS_HAL_STATE_QUEUES_ALLOCATED;
            }

            ocs_device_detach(other_ocs);
            if (0 != ocs_device_attach(other_ocs)) {
                ocs_log_err(other_ocs, "Failed to re-attach the device\n");
                rc = -1;
            } else {
                ocs_log_info(other_ocs, "Successfully re-attached the device\n");
            }
        }
    }

    index = port_index = 0;
    /* Bring up the links on each port to previous state */
    while ((other_ocs = ocs_get_instance(index++)) != NULL) {
        ocs_get_bus_dev_func(other_ocs, &other_bus, &other_dev, &other_func);
        if ((bus == other_bus) && (dev == other_dev) && (port_index < OCS_MAX_HBA_PORTS)) {
            if (prev_port_state[port_index]) {
                ocs_xport_control(other_ocs->xport, OCS_XPORT_PORT_ONLINE);
            }
            port_index++;
        }
    }

    return rc;
}

static uint32_t
ocs_fw_dump_present(ocs_t *ocs, uint32_t *ms_waited)
{
    uint32_t dump_present = FW_DUMP_READY_STATUS_NOT_READY;

    /* Wait for the dump to complete */
    for (*ms_waited = 0; *ms_waited < SLI4_FW_DUMP_TIMEOUT_MSEC; *ms_waited += 100) {

        /* First wait for the status register to reflect steady state
         * values as a result of writing to control/physdev regs
         */
        ocs_delay_msec(100);

        ocs_hal_get(&ocs->hal, OCS_HAL_DUMP_READY, &dump_present);
        if (dump_present)
            break;

    }

    return dump_present;
}

int32_t
ocs_trigger_dump(ocs_t *ocs, uint8_t dump_level)
{
    uint32_t ms_waited = 0;
    uint32_t dump_status = FW_DUMP_READY_STATUS_NOT_READY;

    /* If the chip is in an error state (UE'd), wait for the already triggered dump to complete */
    if (sli_fw_error_status(&ocs->hal.sli) > 0) {
        ocs_log_info(ocs, "Waiting for the recovery dump to complete\n");
        dump_status = ocs_fw_dump_present(ocs, &ms_waited);
    }

    if (FW_DUMP_READY_STATUS_NOT_READY == dump_status) {
        ocs_log_info(ocs, "Initiating the FW dump forcefully\n");

        if (OCS_HAL_RTN_SUCCESS != ocs_hal_raise_ue(&ocs->hal, dump_level)) {
            ocs_log_err(ocs, "Failed to trigger the FW dump\n");
            return OCS_FW_DUMP_STATUS_FAILED;
        }

        ocs_log_info(ocs, "Dump requested, waiting for it to complete\n");
        dump_status = ocs_fw_dump_present(ocs, &ms_waited);
    }

    if (FW_DUMP_READY_STATUS_NOT_READY == dump_status) {
        ocs_log_err(ocs, "Failed to see the FW dump (%d) after %d msec\n", dump_status, ms_waited);
        return OCS_FW_DUMP_STATUS_FAILED;
    }

    if (FW_DUMP_READY_STATUS_SKIP_DUMP == dump_status) {
        ocs_log_info(ocs, "Skipped the FW dump\n");
        return OCS_FW_DUMP_STATUS_SKIP;
    }

    if (ms_waited) {
        ocs_log_info(ocs, "FW dump was generated successfully in %d msec\n", ms_waited);
    } else {
        ocs_log_info(ocs, "FW dump was already present\n");
    }

    return OCS_FW_DUMP_STATUS_SUCCESS;
}

int
ocs_gen_dump(ocs_t *ocs)
{
    int rc = 0;
    uint32_t reset_required;

    /* Collect the FW dump */
    rc = ocs_trigger_dump(ocs, FW_CHIP_LEVEL_DUMP);
    if (rc) {
        return rc;
    }

    /* now reset the adapter */
    ocs_hal_get(&ocs->hal, OCS_HAL_RESET_REQUIRED, &reset_required);
    ocs_log_info(ocs, "Reset required=%d\n", reset_required);
    if (reset_required) {
        if (0 == ocs_fw_reset(ocs)) {
            ocs_log_info(ocs, "All devices reset\n");
        } else {
            ocs_log_err(ocs, "All devices NOT reset\n");
        }
    }

    return rc;
}

/**
 * @brief Check the fw dump state
 *
 * @return TRUE if the state is set, FALSE otherwise
 */
int32_t
ocs_fw_dump_state_check(ocs_t *ocs, uint32_t state)
{
    ocs_t *other_ocs;
    uint8_t bus, dev, func;
    uint8_t other_bus, other_dev, other_func;
    int32_t rc = FALSE;
    uint32_t index = 0;

    ocs_get_bus_dev_func(ocs, &bus, &dev, &func);
    while ((other_ocs = ocs_get_instance(index++)) != NULL) {
        ocs_get_bus_dev_func(other_ocs, &other_bus, &other_dev, &other_func);
        if ((bus == other_bus) && (dev == other_dev)) {
            if ((FW_CHIP_DUMP_STATE_VALID == state) && (0 != other_func)) {
                /* For CLD, check the dump state only on pci func 0 */
                continue;
            }

            if ((FW_FUNC_DUMP_STATE_VALID == state) && (func != other_func)) {
                /* For FDD, check the dump state only on the specified pci func */
                continue;
            }

            /* Return the existing dump irrespective of CLD / FDD request */
            ocs_lock(&other_ocs->fw_dump.lock);
            if (other_ocs->fw_dump.state) {
                rc = TRUE;
                ocs_unlock(&other_ocs->fw_dump.lock);
                break;
            }
            ocs_unlock(&other_ocs->fw_dump.lock);
        }
    }

    return rc;
}